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authorThéo Lebrun <[email protected]>2024-11-06 17:03:55 +0100
committerStephen Boyd <[email protected]>2024-11-14 14:52:26 -0800
commitd75fbc82ee9c0c5441a51aecd36d8f42e8f6b2fa (patch)
treefd6ebd68de9230849c9a69ae55a7f304358a451b /drivers/fpga/fpga-bridge.c
parent4eb5e9c6c4cdfca9fb0577f62580db46f5acd1a5 (diff)
clk: eyeq: require clock index with phandle in all cases
We used to let compatibles with a single clock exposed to not have a cell. Switch away from that and enforce a cell in all cases. This is done at the same time as some compatibles (mobileye,eyeq6h-{central,west}-olb) go from one to more clocks exposed. Let's do the same switch and avoid future devicetree work if/when others follow. Signed-off-by: Théo Lebrun <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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