diff options
| author | Dmitry Osipenko <[email protected]> | 2018-05-04 01:55:37 +0300 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2018-05-04 17:32:29 +0200 |
| commit | 9bf4e370048d2bbae5262d0c6280e0142804a272 (patch) | |
| tree | 906e623449bc16633e8f6b18140b9f7f23c7bca9 /drivers/fpga/fpga-bridge.c | |
| parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) | |
ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
Commit 4c9a27a6c66d ("ARM: tegra: Fix ULPI regression on Tegra20") changed
"ulpi-link" clock from CDEV2 to PLL_P_OUT4. Turned out that PLL_P_OUT4 is
the parent of CDEV2 clock and original clock setup of "ulpi-link" was
correct. The reverted patch was fixing USB for one board and broke the
other, now Tegra's clk driver correctly sets parent for the CDEV2 clock
and hence patch could be reverted safely, restoring USB for all of the
boards.
Signed-off-by: Dmitry Osipenko <[email protected]>
Reviewed-by: Marcel Ziswiler <[email protected]>
Tested-by: Marcel Ziswiler <[email protected]>
Tested-by: Marc Dietrich <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions