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authorSergei Antonov <[email protected]>2022-09-07 23:57:53 +0300
committerUlf Hansson <[email protected]>2022-09-14 12:11:08 +0200
commit35ca91d1338ae158f6dcc0de5d1e86197924ffda (patch)
treee88adf949081b4458fdd5dc83bf549d5478e939e /drivers/fpga/fpga-bridge.c
parentfaded9b5572a27c1eaec19f3a2759b4547507731 (diff)
mmc: moxart: fix 4-bit bus width and remove 8-bit bus width
According to the datasheet [1] at page 377, 4-bit bus width is turned on by bit 2 of the Bus Width Register. Thus the current bitmask is wrong: define BUS_WIDTH_4 BIT(1) BIT(1) does not work but BIT(2) works. This has been verified on real MOXA hardware with FTSDC010 controller revision 1_6_0. The corrected value of BUS_WIDTH_4 mask collides with: define BUS_WIDTH_8 BIT(2). Additionally, 8-bit bus width mode isn't supported according to the datasheet, so let's remove the corresponding code. [1] https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf Fixes: 1b66e94e6b99 ("mmc: moxart: Add MOXA ART SD/MMC driver") Signed-off-by: Sergei Antonov <[email protected]> Cc: Jonas Jensen <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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