diff options
| author | Pratyush Yadav <[email protected]> | 2020-10-05 21:01:30 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2020-11-09 11:56:16 +0530 |
| commit | 354b412967016e2f99fb2d5113e7b92b539f33b6 (patch) | |
| tree | 1cf7a23c5db9609205c1b9b19d30e0c0b8cd173d /drivers/fpga/fpga-bridge.c | |
| parent | 6c6a2b2b8ed6dd1ad1a318afd1035777a73936e0 (diff) | |
mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.
Signed-off-by: Pratyush Yadav <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions