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authorMatthias Schiffer <[email protected]>2022-04-20 17:56:16 +0200
committerMark Brown <[email protected]>2022-04-25 14:01:05 +0100
commit1aeda0966693574c07c5fa72adf41be43d491f96 (patch)
treeec3bfbb46f58b50216e977443e0af876b5af50f1 /drivers/fpga/fpga-bridge.c
parent28ac902aedd18abf4faf8816b1bea6623d0e9509 (diff)
spi: cadence-quadspi: allow operations with cmd/addr buswidth >1
With the removal of the incorrect logic of cqspi_set_protocol(), ops with cmd/addr buswidth >1 are now working correctly. Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash using 1-4-4 operations. DTR operations are currently untested, so we leave them disabled for now (except for the previously allowed 8-8-8 ops). Signed-off-by: Matthias Schiffer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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