diff options
| author | Anthony Koo <[email protected]> | 2019-02-15 14:19:30 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-03-19 15:04:03 -0500 |
| commit | 07d6a199219562834757ac72c28f3836b4e85694 (patch) | |
| tree | caba52fc93644be81e6293f2a689e17dfba01f9f /drivers/fpga/fpga-bridge.c | |
| parent | 09e5665adafa4b00e04acbaa96c73532942f09b3 (diff) | |
drm/amd/display: Fix soft hang issue when some DPCD data invalid
[Why]
AUX transaction returns success, but data has invalid lane count and rate
which when passed to VBIOS command table causes it to soft hang
[How]
Do some sanity checking and fail if the DPCD caps are invalid.
Signed-off-by: Anthony Koo <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions