clk: meson: make pll rst bit as optional

Compared with the previous SoCs, self-adaption current module
is newly added for A1, and there is no reset parameter except the
fixed pll. Since we use clk-pll generic driver for A1 pll
implementation, rst bit should be optional to support new behavior.

Signed-off-by: Jian Hu <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Dmitry Rokosov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jerome Brunet <[email protected]>

0 files changed, 0 insertions, 0 deletions