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| author | Imre Deak <imre.deak@intel.com> | 2023-12-14 00:05:26 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2023-12-18 15:29:19 +0200 |
| commit | dbcab554f777390d9bb6a808ed0cd90ee59bb44e (patch) | |
| tree | 82ba394d9a6f7973cb00d382f8953888bcb1128a /drivers/fpga/altera-pr-ip-core.c | |
| parent | 88a173e5dd05e788068e8fa20a8c37c44bd8f416 (diff) | |
drm/i915/mtl: Fix HDMI/DP PLL clock selection
Select the HDMI specific PLL clock only for HDMI outputs.
Fixes: 62618c7f117e ("drm/i915/mtl: C20 PLL programming")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231213220526.1828827-1-imre.deak@intel.com
(cherry picked from commit 937d02cc79c6828fef28a4d80d8d0ad2f7bf2b62)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/fpga/altera-pr-ip-core.c')
0 files changed, 0 insertions, 0 deletions