diff options
| author | Dmitry Torokhov <[email protected]> | 2023-08-30 16:06:38 -0700 | 
|---|---|---|
| committer | Dmitry Torokhov <[email protected]> | 2023-08-30 16:06:38 -0700 | 
| commit | 1ac731c529cd4d6adbce134754b51ff7d822b145 (patch) | |
| tree | 143ab3f35ca5f3b69f583c84e6964b17139c2ec1 /drivers/dma-buf/dma-fence.c | |
| parent | 07b4c950f27bef0362dc6ad7ee713aab61d58149 (diff) | |
| parent | 54116d442e001e1b6bd482122043b1870998a1f3 (diff) | |
Merge branch 'next' into for-linus
Prepare input updates for 6.6 merge window.
Diffstat (limited to 'drivers/dma-buf/dma-fence.c')
| -rw-r--r-- | drivers/dma-buf/dma-fence.c | 59 | 
1 files changed, 59 insertions, 0 deletions
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index 0de0482cd36e..f177c56269bb 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -913,6 +913,65 @@ err_free_cb:  EXPORT_SYMBOL(dma_fence_wait_any_timeout);  /** + * DOC: deadline hints + * + * In an ideal world, it would be possible to pipeline a workload sufficiently + * that a utilization based device frequency governor could arrive at a minimum + * frequency that meets the requirements of the use-case, in order to minimize + * power consumption.  But in the real world there are many workloads which + * defy this ideal.  For example, but not limited to: + * + * * Workloads that ping-pong between device and CPU, with alternating periods + *   of CPU waiting for device, and device waiting on CPU.  This can result in + *   devfreq and cpufreq seeing idle time in their respective domains and in + *   result reduce frequency. + * + * * Workloads that interact with a periodic time based deadline, such as double + *   buffered GPU rendering vs vblank sync'd page flipping.  In this scenario, + *   missing a vblank deadline results in an *increase* in idle time on the GPU + *   (since it has to wait an additional vblank period), sending a signal to + *   the GPU's devfreq to reduce frequency, when in fact the opposite is what is + *   needed. + * + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline. + * The deadline hint provides a way for the waiting driver, or userspace, to + * convey an appropriate sense of urgency to the signaling driver. + * + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace + * facing APIs).  The time could either be some point in the future (such as + * the vblank based deadline for page-flipping, or the start of a compositor's + * composition cycle), or the current time to indicate an immediate deadline + * hint (Ie. forward progress cannot be made until this fence is signaled). + * + * Multiple deadlines may be set on a given fence, even in parallel.  See the + * documentation for &dma_fence_ops.set_deadline. + * + * The deadline hint is just that, a hint.  The driver that created the fence + * may react by increasing frequency, making different scheduling choices, etc. + * Or doing nothing at all. + */ + +/** + * dma_fence_set_deadline - set desired fence-wait deadline hint + * @fence:    the fence that is to be waited on + * @deadline: the time by which the waiter hopes for the fence to be + *            signaled + * + * Give the fence signaler a hint about an upcoming deadline, such as + * vblank, by which point the waiter would prefer the fence to be + * signaled by.  This is intended to give feedback to the fence signaler + * to aid in power management decisions, such as boosting GPU frequency + * if a periodic vblank deadline is approaching but the fence is not + * yet signaled.. + */ +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) +{ +	if (fence->ops->set_deadline && !dma_fence_is_signaled(fence)) +		fence->ops->set_deadline(fence, deadline); +} +EXPORT_SYMBOL(dma_fence_set_deadline); + +/**   * dma_fence_describe - Dump fence describtion into seq_file   * @fence: the 6fence to describe   * @seq: the seq_file to put the textual description into  |