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| author | Dan Williams <dan.j.williams@intel.com> | 2024-03-13 00:07:36 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2024-03-13 00:07:36 -0700 |
| commit | d5c0078033e2adf30e897d985fd29084ecb56b51 (patch) | |
| tree | 4db9109b51457c17972fa262f1ac1bfc80aad9da /drivers/cxl/core/core.h | |
| parent | c6c3187d66bc4e87086036266def4170742d7214 (diff) | |
| parent | debdce20c4f28b7e5aa48512e7abf270a00e9051 (diff) | |
Merge branch 'for-6.9/cxl-qos' into for-6.9/cxl
Pick up support for CXL "HMEM reporting" for v6.9, i.e. build an HMAT
from CXL CDAT and PCIe switch information.
Diffstat (limited to 'drivers/cxl/core/core.h')
| -rw-r--r-- | drivers/cxl/core/core.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 3b64fb1b9ed0..bc5a95665aa0 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -90,4 +90,8 @@ enum cxl_poison_trace_type { long cxl_pci_get_latency(struct pci_dev *pdev); +int cxl_update_hmat_access_coordinates(int nid, struct cxl_region *cxlr, + enum access_coordinate_class access); +bool cxl_need_node_perf_attrs_update(int nid); + #endif /* __CXL_CORE_H__ */ |