diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2020-08-06 20:20:53 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-20 17:52:54 +0200 |
| commit | 44c01f5ce1c7518886a87d5522528e30e0b4d9f8 (patch) | |
| tree | 7d3113180bc6d87ba18a3c2bf66b83cad9a52d71 /drivers/cpufreq/s3c2412-cpufreq.c | |
| parent | 81b11a6a09964cfea4c525d22548790a1d92d38f (diff) | |
cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
There are two identical copies of the s3c2412_cpufreq_setrefresh
function: a static one in the cpufreq driver and a global
version in iotiming-s3c2412.c.
As the function requires the use of a hardcoded register address
from a header that we want to not be visible to drivers, just
move the existing global function and add a declaration in
one of the cpufreq header files.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-36-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/cpufreq/s3c2412-cpufreq.c')
| -rw-r--r-- | drivers/cpufreq/s3c2412-cpufreq.c | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/drivers/cpufreq/s3c2412-cpufreq.c b/drivers/cpufreq/s3c2412-cpufreq.c index 38dc9e6db633..a77c63e92e1a 100644 --- a/drivers/cpufreq/s3c2412-cpufreq.c +++ b/drivers/cpufreq/s3c2412-cpufreq.c @@ -25,8 +25,6 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/s3c2412.h> - #include <mach/map.h> #define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) @@ -156,27 +154,6 @@ static void s3c2412_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); } -static void s3c2412_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) -{ - struct s3c_cpufreq_board *board = cfg->board; - unsigned long refresh; - - s3c_freq_dbg("%s: refresh %u ns, hclk %lu\n", __func__, - board->refresh, cfg->freq.hclk); - - /* Reduce both the refresh time (in ns) and the frequency (in MHz) - * by 10 each to ensure that we do not overflow 32 bit numbers. This - * should work for HCLK up to 133MHz and refresh period up to 30usec. - */ - - refresh = (board->refresh / 10); - refresh *= (cfg->freq.hclk / 100); - refresh /= (1 * 1000 * 1000); /* 10^6 */ - - s3c_freq_dbg("%s: setting refresh 0x%08lx\n", __func__, refresh); - __raw_writel(refresh, S3C2412_REFRESH); -} - /* set the default cpu frequency information, based on an 200MHz part * as we have no other way of detecting the speed rating in software. */ |