diff options
| author | Kefeng Wang <wangkefeng.wang@huawei.com> | 2020-10-28 21:12:30 +0800 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2020-12-03 19:16:26 +0100 |
| commit | ab3105446f1ec4e98fadfc998ee24feec271c16c (patch) | |
| tree | 2a67e73223d40cd16f4b799830b0d13f711ad8b0 /drivers/clocksource/timer-cadence-ttc.c | |
| parent | 5bd7cb29eceb52e4b108917786fdbf2a2c2048ef (diff) | |
clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI
The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.
Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201028131230.72907-1-wangkefeng.wang@huawei.com
Diffstat (limited to 'drivers/clocksource/timer-cadence-ttc.c')
0 files changed, 0 insertions, 0 deletions