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authorThomas Gleixner <tglx@linutronix.de>2023-08-31 03:21:22 +0200
committerThomas Gleixner <tglx@linutronix.de>2023-08-31 03:21:22 +0200
commit5146e1f589ccb04cf987b45296aa27f90a2407dc (patch)
treee83124418a7b67a001b50b128face860586932d5 /drivers/clocksource/arm_arch_timer.c
parentd2b32be7debd6c0deeae95844997bd89fbe4769d (diff)
parent0a8b07c77ea09602a152d3604e599f95726306d0 (diff)
Merge tag 'timers-v6.6-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clocksource/clockdevice updates from Daniel Lezcano: - Remove oxnas the 0x810 and the 0x820 timer drivers, the platform being no longer maintained and removed (Neil Armstrong) - Disable the timer before programming the CVAL as there is no guarantee of atomicity on the ARM architected timer (Walter Chang) - Set variable ls1x_timer_lock static on the Loongson1 (Tom Rix) - Remove duplication of code and data by factoring out the structures into a single one and convert to the platform driver on the sun5i (Mans Rullgard) - Explicitly include correct DT includes (Rob Herring)
Diffstat (limited to 'drivers/clocksource/arm_arch_timer.c')
-rw-r--r--drivers/clocksource/arm_arch_timer.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e09d4427f604..f6c5f8916e59 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -774,6 +774,13 @@ static __always_inline void set_next_event_mem(const int access, unsigned long e
u64 cnt;
ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
+
+ /* Timer must be disabled before programming CVAL */
+ if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
+ ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
+ arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
+ }
+
ctrl |= ARCH_TIMER_CTRL_ENABLE;
ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;