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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-08-30 15:45:12 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-10-01 10:24:55 +0200 |
| commit | 8a6d97a46dfd73a87b76a277b2045bd4036c35aa (patch) | |
| tree | c9e8626ec6deb4149f5d50ab2918d0c7cbd1afad /drivers/clk/renesas/renesas-cpg-mssr.h | |
| parent | f1195d4ec70b230553bbab80c251c3cd79db715b (diff) | |
clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()
cpg_sd_clock_round_rate() really needs the best rate, not the best
divider. Hence change the iteration to find the former, and get rid of
the final division.
Add an out-of-range rate check while at it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20190830134515.11925-6-geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas/renesas-cpg-mssr.h')
0 files changed, 0 insertions, 0 deletions