diff options
| author | Stephen Boyd <[email protected]> | 2022-05-17 12:44:46 -0700 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2022-05-17 12:44:46 -0700 |
| commit | 3972b152e3da53d46eb3ae5d76c1a2c3856ca1af (patch) | |
| tree | 849c675ffc08798b46ae87b1d47af67e3d716f62 /drivers/clk/imx/clk-imx7d.c | |
| parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) | |
| parent | cf7f3f4fa9e57b8e9f594823e77e6cbb0ce2b254 (diff) | |
Merge tag 'clk-imx-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx
Pull i.MX clk driver updates from Abel Vesa:
- Add 27 MHz phy PLL ref clock
- Add mcore_booted module parameter to tell kernel M core has already booted
- Remove snvs clock
- Add bindings for i.MX8MN GPT
- Add check for kcalloc
- Fix for a potential memory leak in __imx_clk_gpr_sync
- Add DISP2 pixel clock for i.MX8MP
- Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
- Add clkout1/2 for i.MX8MP
- Fix parent clock of ubs_root_clk for i.MX8MP
* tag 'clk-imx-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
clk: imx8mp: fix usb_root_clk parent
clk: imx8mp: add clkout1/2 support
clk: imx: scu: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage
clk: imx8mp: Add DISP2 pixel clock
clk: imx: scu: fix a potential memory leak in __imx_clk_gpr_scu()
clk: imx: Add check for kcalloc
clk: imx8mn: add GPT support
dt-bindings: imx: add clock bindings for i.MX8MN GPT
clk: imx: Remove the snvs clock
clk: imx8m: check mcore_booted before register clk
clk: imx: add mcore_booted module paratemter
clk: imx8mq: add 27m phy pll ref clock
Diffstat (limited to 'drivers/clk/imx/clk-imx7d.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx7d.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 3f6fd7ef2a68..cbf8131c63f7 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -782,7 +782,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) hws[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); hws[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); hws[IMX7D_OCOTP_CLK] = imx_clk_hw_gate4("ocotp_clk", "ipg_root_clk", base + 0x4230, 0); - hws[IMX7D_SNVS_CLK] = imx_clk_hw_gate4("snvs_clk", "ipg_root_clk", base + 0x4250, 0); hws[IMX7D_MU_ROOT_CLK] = imx_clk_hw_gate4("mu_root_clk", "ipg_root_clk", base + 0x4270, 0); hws[IMX7D_CAAM_CLK] = imx_clk_hw_gate4("caam_clk", "ipg_root_clk", base + 0x4240, 0); hws[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_hw_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4690, 0); |