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authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>2024-04-03 13:52:05 +0300
committerMark Brown <broonie@kernel.org>2024-04-03 12:04:23 +0100
commit1f1b820dc3c65b6883da3130ba3b8624dcbf87db (patch)
treecc83236cab7bfb2efa86f0454f2d03d7c1f9f84c /block/blk-pm.c
parentbbdf9af261adca039de29e7fc1faff367bf7e9a0 (diff)
ASoC: SOF: Intel: mtl: Correct rom_status_reg
ACE1 architecture changed the place where the ROM updates the status code from the shared SRAM window to HFFLGP1QW0 register for the status and HFFLGP1QW0 + 4 for the error code. The rom_status_reg is not used on MTL because it was wrongly assigned based on older platform convention (SRAM window) and it was giving inconsistent readings. Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com> Link: https://msgid.link/r/20240403105210.17949-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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