Merge branch 'pm-cpufreq'

Merge cpufreq changes for 6.11-rc1:

 - Add Loongson-3 CPUFreq driver support (Huacai Chen).

 - Add support for the Arrow Lake and Lunar Lake platforms and
   the out-of-band (OOB) mode on Emerald Rapids to the intel_pstate
   cpufreq driver, make it support the highest performance change
   interrupt and clean it up (Srinivas Pandruvada).

 - Switch cpufreq to new Intel CPU model defines (Tony Luck).

 - Simplify the cpufreq driver interface by switching the .exit() driver
   callback to the void return data type (Lizhe, Viresh Kumar).

 - Make cpufreq_boost_enabled() return bool (Dhruva Gole).

 - Add fast CPPC support to the amd-pstate cpufreq driver, address
   multiple assorted issues in it and clean it up (Perry Yuan, Mario
   Limonciello, Dhananjay Ugwekar, Meng Li, Xiaojian Du).

 - Add Allwinner H700 speed bin to the sun50i cpufreq driver (Ryan
   Walklin).

 - Fix memory leaks and of_node_put() usage in the sun50i and qcom-nvmem
   cpufreq drivers (Javier Carrasco).

 - Clean up the sti and dt-platdev cpufreq drivers (Jeff Johnson,
   Raphael Gallais-Pou).

 - Fix deferred probe handling in the TI cpufreq driver and wrong return
   values of ti_opp_supply_probe(), and add OPP tables for the AM62Ax and
   AM62Px SoCs to it (Bryan Brattlof, Primoz Fiser).

 - Avoid overflow of target_freq in .fast_switch() in the SCMI cpufreq
   driver (Jagadeesh Kona).

 - Use dev_err_probe() in every error path in probe in the Mediatek
   cpufreq driver (Nícolas Prado).

 - Fix kernel-doc param for longhaul_setstate in the longhaul cpufreq
   driver (Yang Li).

 - Fix system resume handling in the CPPC cpufreq driver (Riwen Lu).

* pm-cpufreq: (55 commits)
  cpufreq: sti: fix build warning
  cpufreq: mediatek: Use dev_err_probe in every error path in probe
  cpufreq: Add Loongson-3 CPUFreq driver support
  cpufreq: Make cpufreq_driver->exit() return void
  cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC systems
  cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons
  cpufreq: pcc: Remove empty exit() callback
  cpufreq: loongson2: Remove empty exit() callback
  cpufreq: nforce2: Remove empty exit() callback
  cpufreq: docs: Add missing scaling_available_frequencies description
  cpufreq: make cpufreq_boost_enabled() return bool
  cpufreq: intel_pstate: Support highest performance change interrupt
  x86/cpufeatures: Add HWP highest perf change feature flag
  Documentation: cpufreq: amd-pstate: update doc for Per CPU boost control method
  cpufreq: amd-pstate: Cap the CPPC.max_perf to nominal_perf if CPB is off
  cpufreq: amd-pstate: initialize core precision boost state
  cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h
  cpufreq: sti: add missing MODULE_DEVICE_TABLE entry for stih418
  cpufreq: intel_pstate: Replace boot_cpu_has()
  cpufreq: ti: update OPP table for AM62Px SoCs
  ...

3 files changed, 5 insertions, 0 deletions

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 3c7434329661..0d99515530d3 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -361,6 +361,7 @@
 #define X86_FEATURE_HWP_ACT_WINDOW	(14*32+ 9) /* HWP Activity Window */
 #define X86_FEATURE_HWP_EPP		(14*32+10) /* HWP Energy Perf. Preference */
 #define X86_FEATURE_HWP_PKG_REQ		(14*32+11) /* HWP Package Level Request */
+#define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* "" HWP Highest perf change */
 #define X86_FEATURE_HFI			(14*32+19) /* Hardware Feedback Interface */
 
 /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */
@@ -470,6 +471,7 @@
 #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* "" BHI_DIS_S HW control available */
 #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* "" BHI_DIS_S HW control enabled */
 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
+#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* "" AMD Fast CPPC */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index e022e6eb766c..384739d592af 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -781,6 +781,8 @@
 #define MSR_K7_HWCR_IRPERF_EN		BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)
 #define MSR_K7_FID_VID_CTL		0xc0010041
 #define MSR_K7_FID_VID_STATUS		0xc0010042
+#define MSR_K7_HWCR_CPB_DIS_BIT		25
+#define MSR_K7_HWCR_CPB_DIS		BIT_ULL(MSR_K7_HWCR_CPB_DIS_BIT)
 
 /* K6 MSRs */
 #define MSR_K6_WHCR			0xc0000082
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index af5aa2c754c2..c84c30188fdf 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
 	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
+	{ X86_FEATURE_FAST_CPPC, 	CPUID_EDX, 15, 0x80000007, 0 },
 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
 	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },
 	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },