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authorArnaldo Carvalho de Melo <acme@redhat.com>2019-07-08 13:06:57 -0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2019-07-08 13:06:57 -0300
commite3b22a65348ab54261a98b6bc90ecf8977ff8ebf (patch)
tree81c517d6f0e5585be7af5ffa1a4d4136b1f4a9c6 /arch/x86/kernel/acpi/cstate.c
parent05c78468a60f2fd961cd0a0c01c27f288bf81204 (diff)
parent552a031ba12a4236be107a5b082a399237758a5d (diff)
Merge remote-tracking branch 'tip/perf/core' into perf/urgent
To pick up fixes. Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'arch/x86/kernel/acpi/cstate.c')
-rw-r--r--arch/x86/kernel/acpi/cstate.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index a5e5484988fd..caf2edccbad2 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -64,6 +64,21 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
c->x86_stepping >= 0x0e))
flags->bm_check = 1;
}
+
+ if (c->x86_vendor == X86_VENDOR_ZHAOXIN) {
+ /*
+ * All Zhaoxin CPUs that support C3 share cache.
+ * And caches should not be flushed by software while
+ * entering C3 type state.
+ */
+ flags->bm_check = 1;
+ /*
+ * On all recent Zhaoxin platforms, ARB_DISABLE is a nop.
+ * So, set bm_control to zero to indicate that ARB_DISABLE
+ * is not required while entering C3 type state.
+ */
+ flags->bm_control = 0;
+ }
}
EXPORT_SYMBOL(acpi_processor_power_init_bm_check);