diff options
| author | Linus Torvalds <[email protected]> | 2015-02-16 14:58:12 -0800 | 
|---|---|---|
| committer | Linus Torvalds <[email protected]> | 2015-02-16 14:58:12 -0800 | 
| commit | 37507717de51a8332a34ee07fd88700be88df5bf (patch) | |
| tree | d6eb5d00a798a4b1ce40c8c4c8ca74b0d22fe1df /arch/x86/include/asm/processor.h | |
| parent | a68fb48380bb993306dd62a58cbd946b4348222a (diff) | |
| parent | a66734297f78707ce39d756b656bfae861d53f62 (diff) | |
Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 perf updates from Ingo Molnar:
 "This series tightens up RDPMC permissions: currently even highly
  sandboxed x86 execution environments (such as seccomp) have permission
  to execute RDPMC, which may leak various perf events / PMU state such
  as timing information and other CPU execution details.
  This 'all is allowed' RDPMC mode is still preserved as the
  (non-default) /sys/devices/cpu/rdpmc=2 setting.  The new default is
  that RDPMC access is only allowed if a perf event is mmap-ed (which is
  needed to correctly interpret RDPMC counter values in any case).
  As a side effect of these changes CR4 handling is cleaned up in the
  x86 code and a shadow copy of the CR4 value is added.
  The extra CR4 manipulation adds ~ <50ns to the context switch cost
  between rdpmc-capable and rdpmc-non-capable mms"
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86: Add /sys/devices/cpu/rdpmc=2 to allow rdpmc for all tasks
  perf/x86: Only allow rdpmc if a perf_event is mapped
  perf: Pass the event to arch_perf_update_userpage()
  perf: Add pmu callbacks to track event mapping and unmapping
  x86: Add a comment clarifying LDT context switching
  x86: Store a per-cpu shadow copy of CR4
  x86: Clean up cr4 manipulation
Diffstat (limited to 'arch/x86/include/asm/processor.h')
| -rw-r--r-- | arch/x86/include/asm/processor.h | 33 | 
1 files changed, 0 insertions, 33 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index a092a0cce0b7..ec1c93588cef 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -579,39 +579,6 @@ static inline void load_sp0(struct tss_struct *tss,  #define set_iopl_mask native_set_iopl_mask  #endif /* CONFIG_PARAVIRT */ -/* - * Save the cr4 feature set we're using (ie - * Pentium 4MB enable and PPro Global page - * enable), so that any CPU's that boot up - * after us can get the correct flags. - */ -extern unsigned long mmu_cr4_features; -extern u32 *trampoline_cr4_features; - -static inline void set_in_cr4(unsigned long mask) -{ -	unsigned long cr4; - -	mmu_cr4_features |= mask; -	if (trampoline_cr4_features) -		*trampoline_cr4_features = mmu_cr4_features; -	cr4 = read_cr4(); -	cr4 |= mask; -	write_cr4(cr4); -} - -static inline void clear_in_cr4(unsigned long mask) -{ -	unsigned long cr4; - -	mmu_cr4_features &= ~mask; -	if (trampoline_cr4_features) -		*trampoline_cr4_features = mmu_cr4_features; -	cr4 = read_cr4(); -	cr4 &= ~mask; -	write_cr4(cr4); -} -  typedef struct {  	unsigned long		seg;  } mm_segment_t;  |