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| author | Weinan Li <weinan.z.li@intel.com> | 2017-02-22 11:03:24 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-02-23 17:33:15 +0800 |
| commit | d8a355be0b2b5613f7b34aee1394369d45d50586 (patch) | |
| tree | aadf69e7d2a4898677dc6deca6949405438b3e8b /arch/sparc | |
| parent | da9cc8de22aa6bd6ed51c406432d599ab520a6e3 (diff) | |
drm/i915/gvt: refine pcode write emulation
In GVT-g we always emulate as pcode read/write success and ready for access
anytime, since we don't touch real physical registers here.
Add 'SKL_PCODE_CDCLK_CONTROL' write emulation, without it will cause
skl_set_cdclk fail in guest.
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'arch/sparc')
0 files changed, 0 insertions, 0 deletions