diff options
| author | Dan Williams <[email protected]> | 2009-09-08 17:55:21 -0700 |
|---|---|---|
| committer | Dan Williams <[email protected]> | 2009-09-08 17:55:21 -0700 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/sh/include/mach-common/mach/sh7785lcr.h | |
| parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
| parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/sh/include/mach-common/mach/sh7785lcr.h')
| -rw-r--r-- | arch/sh/include/mach-common/mach/sh7785lcr.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h index 1ce27d5c7491..90011d435f30 100644 --- a/arch/sh/include/mach-common/mach/sh7785lcr.h +++ b/arch/sh/include/mach-common/mach/sh7785lcr.h @@ -9,11 +9,11 @@ * -----------------------------+---------------+--------------- * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD - * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C + * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 - * 0x14000000 - 0x17ffffff(CS5) | I2C | USB + * 0x14000000 - 0x17ffffff(CS5) | reserved | USB * 0x18000000 - 0x1bffffff(CS6) | reserved | SD * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) * @@ -32,6 +32,9 @@ #define PLD_VERSR (PLD_BASE_ADDR + 0x0c) #define PLD_MMSR (PLD_BASE_ADDR + 0x0e) +#define PCA9564_ADDR 0x06000000 /* I2C */ +#define PCA9564_SIZE 0x00000100 + #define SM107_MEM_ADDR 0x10000000 #define SM107_MEM_SIZE 0x00e00000 #define SM107_REG_ADDR 0x13e00000 @@ -40,16 +43,13 @@ #if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) #define R8A66597_ADDR 0x14000000 /* USB */ #define CG200_ADDR 0x18000000 /* SD */ -#define PCA9564_ADDR 0x06000000 /* I2C */ #else #define R8A66597_ADDR 0x08000000 #define CG200_ADDR 0x0c000000 -#define PCA9564_ADDR 0x14000000 #endif #define R8A66597_SIZE 0x00000100 #define CG200_SIZE 0x00010000 -#define PCA9564_SIZE 0x00000100 #endif /* __ASM_SH_RENESAS_SH7785LCR_H */ |