aboutsummaryrefslogtreecommitdiff
path: root/arch/sh/include/asm/cpu-features.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-16 19:24:00 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-16 19:24:00 -0700
commit8d2b6b3ae280dcf6f6c7a95623670a57cdf562ed (patch)
tree79e0c663f37c380735a41031abaa73b4c299c9ca /arch/sh/include/asm/cpu-features.h
parent90a24a4a7e8f8b3488438276e1d15bb3762df31e (diff)
parent0dd4d5cbe4c38165dc9b3ad329ebb23f24d74fdb (diff)
Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh
Pull SuperH updates from Paul Mundt. The bulk of this is the UAPI disintegration for SH. * tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: sh: Fix up more fallout from pointless ARM __iomem churn. sh: Wire up kcmp syscall. UAPI: (Scripted) Disintegrate arch/sh/include/asm
Diffstat (limited to 'arch/sh/include/asm/cpu-features.h')
-rw-r--r--arch/sh/include/asm/cpu-features.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/asm/cpu-features.h
deleted file mode 100644
index 694abe490edb..000000000000
--- a/arch/sh/include/asm/cpu-features.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __ASM_SH_CPU_FEATURES_H
-#define __ASM_SH_CPU_FEATURES_H
-
-/*
- * Processor flags
- *
- * Note: When adding a new flag, keep cpu_flags[] in
- * arch/sh/kernel/setup.c in sync so symbolic name
- * mapping of the processor flags has a chance of being
- * reasonably accurate.
- *
- * These flags are also available through the ELF
- * auxiliary vector as AT_HWCAP.
- */
-#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
-#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
-#define CPU_HAS_PTEA 0x0020 /* PTEA register */
-#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */
-#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
-#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
-#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
-
-#endif /* __ASM_SH_CPU_FEATURES_H */