diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-06-03 14:01:43 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-06-03 14:01:43 -0700 |
commit | f66e797b407bc03a438d1f05057dc7918bab473f (patch) | |
tree | 17cebbf1f6ff43f62d414cd1b57d1f82bb9daf56 /arch/riscv/kernel | |
parent | 4ab6cfc4ad9f867a107b0ef029088dd4c0a8f83c (diff) | |
parent | 61114e734ccb804bc12561ab4020745e02c468c2 (diff) |
Merge tag 'riscv-for-linus-5.19-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull more RISC-V updates from Palmer Dabbelt:
"This is mostly some DT updates, but also a handful of cleanups and
some fixes. The most user-visible of those are:
- A device tree for the Sundance Polarberry, along with a handful of
fixes and clenups to the PolarFire SOC device trees and bindings.
- The memfd_secret syscall number is now visible to userspace,
- Some improvements to the vm layout dump, which really should have
followed shortly after the sv48 patches but I missed"
* tag 'riscv-for-linus-5.19-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Move alternative length validation into subsection
riscv: mm: init: make pt_ops_set_[early|late|fixmap] static
riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild
RISC-V: Mark IORESOURCE_EXCLUSIVE for reserved mem instead of IORESOURCE_BUSY
riscv: Wire up memfd_secret in UAPI header
riscv: Fix irq_work when SMP is disabled
riscv: Improve virtual kernel memory layout dump
riscv: Initialize thread pointer before calling C functions
Documentation: riscv: Add sv48 description to VM layout
RISC-V: Only default to spinwait on SBI-0.1 and M-mode
riscv: dts: icicle: sort nodes alphabetically
riscv: microchip: icicle: readability fixes
riscv: dts: microchip: add the sundance polarberry
dt-bindings: riscv: microchip: add polarberry compatible string
dt-bindings: vendor-prefixes: add Sundance DSP
riscv: dts: microchip: make the fabric dtsi board specific
dt-bindings: riscv: microchip: document icicle reference design
riscv: dts: microchip: remove soc vendor from filenames
riscv: dts: microchip: move sysctrlr out of soc bus
riscv: dts: microchip: remove icicle memory clocks
Diffstat (limited to 'arch/riscv/kernel')
-rw-r--r-- | arch/riscv/kernel/head.S | 1 | ||||
-rw-r--r-- | arch/riscv/kernel/setup.c | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 273eb0fa1f50..b865046e4dbb 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -298,6 +298,7 @@ clear_bss_done: REG_S a0, (a2) /* Initialize page tables and relocate to virtual addresses */ + la tp, init_task la sp, init_thread_union + THREAD_SIZE XIP_FIXUP_OFFSET sp #ifdef CONFIG_BUILTIN_DTB diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index e0373a3056e8..f0f36a4a0e9b 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -190,7 +190,7 @@ static void __init init_resources(void) res = &mem_res[res_idx--]; res->name = "Reserved"; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; + res->flags = IORESOURCE_MEM | IORESOURCE_EXCLUSIVE; res->start = __pfn_to_phys(memblock_region_reserved_base_pfn(region)); res->end = __pfn_to_phys(memblock_region_reserved_end_pfn(region)) - 1; @@ -215,7 +215,7 @@ static void __init init_resources(void) if (unlikely(memblock_is_nomap(region))) { res->name = "Reserved"; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; + res->flags = IORESOURCE_MEM | IORESOURCE_EXCLUSIVE; } else { res->name = "System RAM"; res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; |