diff options
author | David S. Miller <davem@davemloft.net> | 2020-05-15 13:48:59 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2020-05-15 13:48:59 -0700 |
commit | da07f52d3caf6c24c6dbffb5500f379d819e04bd (patch) | |
tree | 836e51994554f1aeddeebb6cb6ee568944a467e7 /arch/riscv/include/asm/perf_event.h | |
parent | 93d43e58683efd958a0421b932a273df74e0e008 (diff) | |
parent | f85c1598ddfe83f61d0656bd1d2025fa3b148b99 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Move the bpf verifier trace check into the new switch statement in
HEAD.
Resolve the overlapping changes in hinic, where bug fixes overlap
the addition of VF support.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/riscv/include/asm/perf_event.h')
-rw-r--r-- | arch/riscv/include/asm/perf_event.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/riscv/include/asm/perf_event.h b/arch/riscv/include/asm/perf_event.h index 0234048b12bc..062efd3a1d5d 100644 --- a/arch/riscv/include/asm/perf_event.h +++ b/arch/riscv/include/asm/perf_event.h @@ -12,19 +12,14 @@ #include <linux/ptrace.h> #include <linux/interrupt.h> +#ifdef CONFIG_RISCV_BASE_PMU #define RISCV_BASE_COUNTERS 2 /* * The RISCV_MAX_COUNTERS parameter should be specified. */ -#ifdef CONFIG_RISCV_BASE_PMU #define RISCV_MAX_COUNTERS 2 -#endif - -#ifndef RISCV_MAX_COUNTERS -#error "Please provide a valid RISCV_MAX_COUNTERS for the PMU." -#endif /* * These are the indexes of bits in counteren register *minus* 1, @@ -82,6 +77,7 @@ struct riscv_pmu { int irq; }; +#endif #ifdef CONFIG_PERF_EVENTS #define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs #endif |