diff options
| author | Chen Wang <unicorn_wang@outlook.com> | 2024-01-30 09:50:32 +0800 |
|---|---|---|
| committer | Inochi Amaoto <inochiama@outlook.com> | 2024-02-23 12:38:03 +0800 |
| commit | 1ce7587e507e1762df1dadc22affcd41376040d5 (patch) | |
| tree | e24ebc285dea9b2f4672b487346971a1fce129b3 /arch/riscv/boot | |
| parent | 41bccc98fb7931d63d03f326a746ac4d429c1dd3 (diff) | |
riscv: dts: add reset generator for Sophgo SG2042 SoC
Add reset generator node to device tree for SG2042.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/b2f5d7cd2d3fccfc00cf4563d2dd7363b0fa2fca.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2042.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index ead1cc35d88b..eeb341e16bfd 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -6,6 +6,8 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/reset/sophgo,sg2042-reset.h> + #include "sg2042-cpus.dtsi" / { @@ -327,6 +329,12 @@ riscv,ndev = <224>; }; + rstgen: reset-controller@7030013000 { + compatible = "sophgo,sg2042-reset"; + reg = <0x00000070 0x30013000 0x00000000 0x0000000c>; + #reset-cells = <1>; + }; + uart0: serial@7040000000 { compatible = "snps,dw-apb-uart"; reg = <0x00000070 0x40000000 0x00000000 0x00001000>; |