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| author | Al Viro <viro@zeniv.linux.org.uk> | 2016-01-04 10:25:34 -0500 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2016-01-04 10:25:34 -0500 |
| commit | 7e935c7ca1e6c398f11edac5beabfc4348e3b3a4 (patch) | |
| tree | 86da864ba6341bd86b5f5450c611f918722237b2 /arch/parisc/kernel/pci.c | |
| parent | c62432b40b5e03c25faf2c8f8547bba4908b8945 (diff) | |
| parent | e9d408e107db9a554b36c3a79f67b37dd3e16da0 (diff) | |
Merge branch 'memdup_user_nul' into work.misc
Diffstat (limited to 'arch/parisc/kernel/pci.c')
| -rw-r--r-- | arch/parisc/kernel/pci.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 64f2764a8cef..c99f3dde455c 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -171,24 +171,6 @@ void pcibios_set_master(struct pci_dev *dev) } -void __init pcibios_init_bus(struct pci_bus *bus) -{ - struct pci_dev *dev = bus->self; - unsigned short bridge_ctl; - - /* We deal only with pci controllers and pci-pci bridges. */ - if (!dev || (dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) - return; - - /* PCI-PCI bridge - set the cache line and default latency - (32) for primary and secondary buses. */ - pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 32); - - pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bridge_ctl); - bridge_ctl |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; - pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl); -} - /* * pcibios align resources() is called every time generic PCI code * wants to generate a new address. The process of looking for |