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author | Hai Li <hali@codeaurora.org> | 2017-01-03 19:31:16 +0530 |
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committer | Rob Clark <robdclark@gmail.com> | 2017-02-06 11:28:45 -0500 |
commit | a4df68fa232e979fb74b2efe6997d0f38cbfc626 (patch) | |
tree | 63a78511b4570fe87898e1e5646c5102f3c0472e /arch/mips/xilfpga/init.c | |
parent | b62aa70a98c5401ada63657eee7c88da70bdbb27 (diff) |
drm/msm/dsi: Add new method to calculate 14nm PHY timings
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'arch/mips/xilfpga/init.c')
0 files changed, 0 insertions, 0 deletions