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author | Damien Riegel <damien.riegel@savoirfairelinux.com> | 2017-12-07 10:19:41 -0500 |
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committer | Andy Gross <andy.gross@linaro.org> | 2017-12-31 23:50:13 -0600 |
commit | 500566e0e9fc1e5f3d260c691c58071cab596598 (patch) | |
tree | 16e703d328a7e3e94c22949e47a90c3be41b1357 /arch/mips/kernel/segment.c | |
parent | 24fe618b2d9a10091454def66838b786f0649855 (diff) |
arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x500 for all of them, as this is the actual size of these
blocks. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/mips/kernel/segment.c')
0 files changed, 0 insertions, 0 deletions