diff options
| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2024-07-14 10:41:05 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2024-07-23 09:29:49 +0200 |
| commit | fa165f919016829e542e37782a3452512dffa5ea (patch) | |
| tree | c0c7c388180edfaeb1b7936513742896b441a81d /arch/mips/include | |
| parent | bb2d63500b5c8fd1ea425caffe2d44c931fefc6b (diff) | |
MIPS: Loongson64: Switch to SYNC_R4K
Nowadays SYNC_R4K is performing better than Loongson64's
custom sync mechanism.
Switch to SYNC_R4K to improve performance and reduce code
duplication.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/smp.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index bc2c240f414b..2427d76f953f 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -50,7 +50,6 @@ extern int __cpu_logical_map[NR_CPUS]; #define SMP_CALL_FUNCTION 0x2 /* Octeon - Tell another core to flush its icache */ #define SMP_ICACHE_FLUSH 0x4 -#define SMP_ASK_C0COUNT 0x8 /* Mask of CPUs which are currently definitely operating coherently */ extern cpumask_t cpu_coherent_mask; |