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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-08-24 18:32:49 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-09-07 22:24:27 +0200
commit256ec489f1c7726f0db9ffee88ba7cdc317806cd (patch)
treec144af757fa94627e5c0cd765da9e31d02af5f8a /arch/mips/include/asm/war.h
parent886ee1363a3ad2b890959f07cffe8d91d995b93a (diff)
MIPS: Convert R10000_LLSC_WAR info a config option
Use a new config option to enabel R1000_LLSC workaound and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/war.h')
-rw-r--r--arch/mips/include/asm/war.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h
index a0942821d67d..d405ecb78cbd 100644
--- a/arch/mips/include/asm/war.h
+++ b/arch/mips/include/asm/war.h
@@ -94,14 +94,6 @@
#endif
/*
- * On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
- * may cause ll / sc and lld / scd sequences to execute non-atomically.
- */
-#ifndef R10000_LLSC_WAR
-#error Check setting of R10000_LLSC_WAR for your platform
-#endif
-
-/*
* 34K core erratum: "Problems Executing the TLBR Instruction"
*/
#ifndef MIPS34K_MISSED_ITLB_WAR