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authorJiri Kosina <[email protected]>2020-04-01 12:26:12 +0200
committerJiri Kosina <[email protected]>2020-04-01 12:26:12 +0200
commitc9f289701540baeef9ac7c9977d67a7259f404db (patch)
treeac3c29d41da02ac735c9a12da78905842fbccd2f /arch/mips/include/asm/sync.h
parent0aac6f9aaae5fba08963651d2ce49930145e118f (diff)
parent910a7e89cec65efad254c947ce2bf8bf5b370962 (diff)
Merge branch 'for-5.7/appleir' into for-linus
- small code cleanups in hid-appleir from Lucas Tanure
Diffstat (limited to 'arch/mips/include/asm/sync.h')
-rw-r--r--arch/mips/include/asm/sync.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/sync.h b/arch/mips/include/asm/sync.h
index 7c6a1095f556..aabd097933fe 100644
--- a/arch/mips/include/asm/sync.h
+++ b/arch/mips/include/asm/sync.h
@@ -155,9 +155,11 @@
* effective barrier as noted by commit 6b07d38aaa52 ("MIPS: Octeon: Use
* optimized memory barrier primitives."). Here we specify that the affected
* sync instructions should be emitted twice.
+ * Note that this expression is evaluated by the assembler (not the compiler),
+ * and that the assembler evaluates '==' as 0 or -1, not 0 or 1.
*/
#ifdef CONFIG_CPU_CAVIUM_OCTEON
-# define __SYNC_rpt(type) (1 + (type == __SYNC_wmb))
+# define __SYNC_rpt(type) (1 - (type == __SYNC_wmb))
#else
# define __SYNC_rpt(type) 1
#endif