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| author | Ingo Molnar <mingo@elte.hu> | 2009-03-13 02:14:25 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-03-13 02:14:25 +0100 |
| commit | 25d500067d5a666d1336598d1b324793554e5496 (patch) | |
| tree | 3402308c4c69a66d02ce55f5c165e242fad2a8a9 /arch/mips/include/asm/prefetch.h | |
| parent | 0b13fda1e0936b3d64c4c407f183d33fa6bd2ad4 (diff) | |
| parent | 9ead64974b05501bbac0d63a47c99fa786d064ba (diff) | |
Merge branch 'linus' into core/ipi
Diffstat (limited to 'arch/mips/include/asm/prefetch.h')
| -rw-r--r-- | arch/mips/include/asm/prefetch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h index 17850834ccb0..a56594f360ee 100644 --- a/arch/mips/include/asm/prefetch.h +++ b/arch/mips/include/asm/prefetch.h @@ -26,7 +26,7 @@ * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in * current versions due to erratum G105. * - * VR7701 only implements the Load prefetch. + * VR5500 (including VR5701 and VR7701) only implement load prefetch. * * Finally MIPS32 and MIPS64 implement all of the following hints. */ |