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| author | Jiri Kosina <jkosina@suse.cz> | 2010-10-30 22:16:56 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-10-30 22:16:56 +0200 |
| commit | f1e095f1d206b81b44160f41278ce5c78641e9b7 (patch) | |
| tree | bd293d46d2d3e4cdf435a22ddb2877c6ba1b8acc /arch/mips/include/asm/octeon/pci-octeon.h | |
| parent | b0438a1b71955c425c304a2a483765ef24841766 (diff) | |
| parent | 1792f17b7210280a3d7ff29da9614ba779cfcedb (diff) | |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/mips/include/asm/octeon/pci-octeon.h')
| -rw-r--r-- | arch/mips/include/asm/octeon/pci-octeon.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h index ece78043acf6..fba2ba200f58 100644 --- a/arch/mips/include/asm/octeon/pci-octeon.h +++ b/arch/mips/include/asm/octeon/pci-octeon.h @@ -36,6 +36,16 @@ extern int (*octeon_pcibios_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); /* + * For PCI (not PCIe) the BAR2 base address. + */ +#define OCTEON_BAR2_PCI_ADDRESS 0x8000000000ull + +/* + * For PCI (not PCIe) the base of the memory mapped by BAR1 + */ +extern u64 octeon_bar1_pci_phys; + +/* * The following defines are used when octeon_dma_bar_type = * OCTEON_DMA_BAR_TYPE_BIG */ |