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authorIngo Molnar <[email protected]>2020-02-24 11:36:09 +0100
committerIngo Molnar <[email protected]>2020-02-24 11:36:09 +0100
commit546121b65f47384e11ec1fa2e55449fc9f4846b2 (patch)
tree8f18470ec7c0c77b0f48eb1b2338e591b0b0aaff /arch/mips/include/asm/mipsregs.h
parent000619680c3714020ce9db17eef6a4a7ce2dc28b (diff)
parentf8788d86ab28f61f7b46eb6be375f8a726783636 (diff)
Merge tag 'v5.6-rc3' into sched/core, to pick up fixes and dependent patches
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
-rw-r--r--arch/mips/include/asm/mipsregs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 0d5a30988697..796fe47cfd17 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1101,9 +1101,12 @@
/*
* Bits 22:20 of the FPU Status Register will be read as 0,
* and should be written as zero.
+ * MAC2008 was removed in Release 5 so we still treat it as
+ * reserved.
*/
#define FPU_CSR_RSVD (_ULCAST_(7) << 20)
+#define FPU_CSR_MAC2008 (_ULCAST_(1) << 20)
#define FPU_CSR_ABS2008 (_ULCAST_(1) << 19)
#define FPU_CSR_NAN2008 (_ULCAST_(1) << 18)