diff options
| author | Mark Brown <[email protected]> | 2016-02-09 18:20:39 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2016-02-09 18:20:39 +0000 |
| commit | fcdcc79628a1919bde9acf239e364f65bab6327c (patch) | |
| tree | 5499be387cf3028c90ac083b1cf866ebed7bf7e0 /arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h | |
| parent | 7a8d44bc89e5cddcd5c0704a11a90484d36ba6ba (diff) | |
| parent | a0a90718f18264dc904d34a580f332006f5561e9 (diff) | |
Merge branch 'topic/acpi' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-pxa2xx
Diffstat (limited to 'arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h')
| -rw-r--r-- | arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h new file mode 100644 index 000000000000..15db1b330fe8 --- /dev/null +++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h @@ -0,0 +1,65 @@ +/* + * Ralink MT7621 specific CPU feature overrides + * + * Copyright (C) 2008-2009 Gabor Juhos <[email protected]> + * Copyright (C) 2008 Imre Kaloz <[email protected]> + * Copyright (C) 2015 Felix Fietkau <[email protected]> + * + * This file was derived from: include/asm-mips/cpu-features.h + * Copyright (C) 2003, 2004 Ralf Baechle + * Copyright (C) 2004 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + */ +#ifndef _MT7621_CPU_FEATURE_OVERRIDES_H +#define _MT7621_CPU_FEATURE_OVERRIDES_H + +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_3k_cache 0 +#define cpu_has_4k_cache 1 +#define cpu_has_tx39_cache 0 +#define cpu_has_sb1_cache 0 +#define cpu_has_fpu 0 +#define cpu_has_32fpr 0 +#define cpu_has_counter 1 +#define cpu_has_watch 1 +#define cpu_has_divec 1 + +#define cpu_has_prefetch 1 +#define cpu_has_ejtag 1 +#define cpu_has_llsc 1 + +#define cpu_has_mips16 1 +#define cpu_has_mdmx 0 +#define cpu_has_mips3d 0 +#define cpu_has_smartmips 0 + +#define cpu_has_mips32r1 1 +#define cpu_has_mips32r2 1 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + +#define cpu_has_dsp 1 +#define cpu_has_dsp2 0 +#define cpu_has_mipsmt 1 + +#define cpu_has_64bits 0 +#define cpu_has_64bit_zero_reg 0 +#define cpu_has_64bit_gp_regs 0 +#define cpu_has_64bit_addresses 0 + +#define cpu_dcache_line_size() 32 +#define cpu_icache_line_size() 32 + +#define cpu_has_dc_aliases 0 +#define cpu_has_vtag_icache 0 + +#define cpu_has_rixi 0 +#define cpu_has_tlbinv 0 +#define cpu_has_userlocal 1 + +#endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */ |