diff options
author | Daniel Vetter <[email protected]> | 2013-03-19 09:47:30 +0100 |
---|---|---|
committer | Daniel Vetter <[email protected]> | 2013-03-19 09:47:30 +0100 |
commit | 0d4a42f6bd298e826620585e766a154ab460617a (patch) | |
tree | 406d8f7778691d858dbe3e48e4bbb10e99c0a58a /arch/mips/include/asm/cpu-info.h | |
parent | d62b4892f3d9f7dd2002e5309be10719d6805b0f (diff) | |
parent | a937536b868b8369b98967929045f1df54234323 (diff) |
Merge tag 'v3.9-rc3' into drm-intel-next-queued
Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in
commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <[email protected]>
Date: Wed Feb 27 17:02:56 2013 -0800
lib/scatterlist: add simple page iterator
The merge itself is just two trivial conflicts:
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r-- | arch/mips/include/asm/cpu-info.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index c454550eb0c0..41401d8eb7d1 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -52,14 +52,14 @@ struct cpuinfo_mips { unsigned int cputype; int isa_level; int tlbsize; - struct cache_desc icache; /* Primary I-cache */ - struct cache_desc dcache; /* Primary D or combined I/D cache */ - struct cache_desc scache; /* Secondary cache */ - struct cache_desc tcache; /* Tertiary/split secondary cache */ - int srsets; /* Shadow register sets */ + struct cache_desc icache; /* Primary I-cache */ + struct cache_desc dcache; /* Primary D or combined I/D cache */ + struct cache_desc scache; /* Secondary cache */ + struct cache_desc tcache; /* Tertiary/split secondary cache */ + int srsets; /* Shadow register sets */ int core; /* physical core number */ #ifdef CONFIG_64BIT - int vmbits; /* Virtual memory size in bits */ + int vmbits; /* Virtual memory size in bits */ #endif #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* @@ -68,12 +68,12 @@ struct cpuinfo_mips { * exception resources, ASID spaces, etc, are common * to all TCs within the same VPE. */ - int vpe_id; /* Virtual Processor number */ + int vpe_id; /* Virtual Processor number */ #endif #ifdef CONFIG_MIPS_MT_SMTC - int tc_id; /* Thread Context number */ + int tc_id; /* Thread Context number */ #endif - void *data; /* Additional data */ + void *data; /* Additional data */ unsigned int watch_reg_count; /* Number that exist */ unsigned int watch_reg_use_cnt; /* Usable by ptrace */ #define NUM_WATCH_REGS 4 |