diff options
| author | Manuel Lauss <manuel.lauss@googlemail.com> | 2009-10-07 20:15:15 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:52:53 +0100 |
| commit | 788144656b8a862e724a1296e64ab6375eb541ed (patch) | |
| tree | 96208eed56da25acdf9d923b9d9986e82dcd8944 /arch/mips/alchemy/devboards/db1x00/platform.c | |
| parent | 93e9cd8485b31e5a33f1040bff4d15e65c0b2d19 (diff) | |
MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy
variants. IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.
This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!
Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.
Run-tested on DB1200.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/devboards/db1x00/platform.c')
| -rw-r--r-- | arch/mips/alchemy/devboards/db1x00/platform.c | 52 |
1 files changed, 33 insertions, 19 deletions
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index b762b790512a..0ac5dd05d3c0 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -24,32 +24,46 @@ #include <asm/mach-au1x00/au1xxx.h> #include "../platform.h" -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ - defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) -#define DB1XXX_HAS_PCMCIA -#endif - /* DB1xxx PCMCIA interrupt sources: * CD0/1 GPIO0/3 * STSCHG0/1 GPIO1/4 * CARD0/1 GPIO2/5 * Db1550: 0/1, 21/22, 3/5 */ -#ifndef CONFIG_MIPS_DB1550 -/* Db1000, Db1100, Db1500 */ -#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 -#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO_1 -#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_2 -#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_3 -#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO_4 -#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 + +#define DB1XXX_HAS_PCMCIA + +#if defined(CONFIG_MIPS_DB1000) +#define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1100) +#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1500) +#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1550) +#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT +#define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT +#define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT +#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT #else -#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 -#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO_21 -#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_3 -#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_1 -#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO_22 -#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 +/* other board: no PCMCIA */ +#undef DB1XXX_HAS_PCMCIA #endif static int __init db1xxx_dev_init(void) |