diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-26 15:55:40 +0100 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2022-02-08 13:21:09 +0100 |
commit | 2e8a8b5955a000cc655f7e368670518cbb77fe58 (patch) | |
tree | 244036c164cc52f2923a2c10eb47e31be5474bc1 /arch/arm64 | |
parent | 8fd9415042826c7609c588e5ef45f3e84237785f (diff) |
arm64: dts: rockchip: reorder rk3399 hdmi clocks
The binding specifies the clock order to "cec", "grf", "vpll". Reorder
the clocks accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index d3cdf6f42a30..080457a68e3c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1881,10 +1881,10 @@ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, - <&cru PLL_VPLL>, + <&cru SCLK_HDMI_CEC>, <&cru PCLK_VIO_GRF>, - <&cru SCLK_HDMI_CEC>; - clock-names = "iahb", "isfr", "vpll", "grf", "cec"; + <&cru PLL_VPLL>; + clock-names = "iahb", "isfr", "cec", "grf", "vpll"; power-domains = <&power RK3399_PD_HDCP>; reg-io-width = <4>; rockchip,grf = <&grf>; |