diff options
| author | Mark Brown <broonie@kernel.org> | 2022-07-04 18:02:51 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-07-05 11:45:47 +0100 |
| commit | 9a3634d023012cf54e541f825ed11ff481c6a110 (patch) | |
| tree | 56cad1f652361bd038bf7a956761e180e82f1024 /arch/arm64/include | |
| parent | b2d71f275d544719598ed754069f2bb421e4af17 (diff) | |
arm64/sysreg: Convert CTR_EL0 to automatic generation
Convert CTR_EL0 to automatic register generation as per DDI0487H.a, no
functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-18-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 0b547f181fb0..234f9a3844de 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -461,7 +461,6 @@ #define SMIDR_EL1_SMPS_SHIFT 15 #define SMIDR_EL1_AFFINITY_SHIFT 0 -#define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1) #define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7) #define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0) @@ -1082,21 +1081,6 @@ #define MVFR2_FPMISC_SHIFT 4 #define MVFR2_SIMDMISC_SHIFT 0 -#define CTR_EL0_L1Ip_VPIPT 0 -#define CTR_EL0_L1Ip_VIPT 2 -#define CTR_EL0_L1Ip_PIPT 3 - -#define CTR_EL0_L1Ip_SHIFT 14 -#define CTR_EL0_L1Ip_MASK 3 -#define CTR_EL0_DminLine_SHIFT 16 -#define CTR_EL0_IminLine_SHIFT 0 -#define CTR_EL0_IminLine_MASK 0xf -#define CTR_EL0_ERG_SHIFT 20 -#define CTR_EL0_CWG_SHIFT 24 -#define CTR_EL0_CWG_MASK 15 -#define CTR_EL0_IDC_SHIFT 28 -#define CTR_EL0_DIC_SHIFT 29 - #define DCZID_EL0_DZP_SHIFT 4 #define DCZID_EL0_BS_SHIFT 0 |