diff options
| author | Vignesh R <vigneshr@ti.com> | 2018-12-09 15:52:21 +0530 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2018-12-14 09:57:11 +0200 |
| commit | 2cd7d393f461b931bd6ba2f3971f20b087a1b952 (patch) | |
| tree | 7d524e456c736e91f66edac60e9ead004d925d86 /arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | |
| parent | c484fc957219e95e023efe74bfc6cc189303e6f4 (diff) | |
arm64: dts: ti: k3-am654: Add McSPI DT nodes
There are 3 instances of McSPI in MCU domain and 4 instances in Main domain.
Add DT nodes for all McSPI instances present on AM654 SoC.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 3b7a519960b9..593f718e8fb5 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -27,4 +27,34 @@ clocks = <&k3_clks 114 1>; power-domains = <&k3_pds 114>; }; + + mcu_spi0: spi@40300000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x0 0x40300000 0x0 0x400>; + interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&k3_clks 142 1>; + power-domains = <&k3_pds 142>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mcu_spi1: spi@40310000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x0 0x40310000 0x0 0x400>; + interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&k3_clks 143 1>; + power-domains = <&k3_pds 143>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mcu_spi2: spi@40320000 { + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; + reg = <0x0 0x40320000 0x0 0x400>; + interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&k3_clks 144 1>; + power-domains = <&k3_pds 144>; + #address-cells = <1>; + #size-cells = <0>; + }; }; |