diff options
| author | Rodrigo Vivi <[email protected]> | 2018-07-23 09:13:12 -0700 | 
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2018-07-23 09:13:12 -0700 | 
| commit | c74a7469f97c0f40b46e82ee979f9fb1bb6e847c (patch) | |
| tree | f2690a1a916b73ef94657fbf0e0141ae57701825 /arch/arm/mach-davinci/dm646x.c | |
| parent | 6f15a7de86c8cf2dc09fc9e6d07047efa40ef809 (diff) | |
| parent | 500775074f88d9cf5416bed2ca19592812d62c41 (diff) | |
Merge drm/drm-next into drm-intel-next-queued
We need a backmerge to get DP_DPCD_REV_14 before we push other
i915 changes to dinq that could break compilation.
Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'arch/arm/mach-davinci/dm646x.c')
| -rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 3 | 
1 files changed, 2 insertions, 1 deletions
| diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 109ab1fa0d2c..c32ca27ab343 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -488,7 +488,8 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {  	[IRQ_DM646X_MCASP0TXINT]        = 7,  	[IRQ_DM646X_MCASP0RXINT]        = 7,  	[IRQ_DM646X_RESERVED_3]         = 7, -	[IRQ_DM646X_MCASP1TXINT]        = 7,    /* clockevent */ +	[IRQ_DM646X_MCASP1TXINT]        = 7, +	[IRQ_TINT0_TINT12]              = 7,    /* clockevent */  	[IRQ_TINT0_TINT34]              = 7,    /* clocksource */  	[IRQ_TINT1_TINT12]              = 7,    /* DSP timer */  	[IRQ_TINT1_TINT34]              = 7,    /* system tick */ |