diff options
author | Jiri Kosina <jkosina@suse.cz> | 2010-10-30 22:16:56 +0200 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2010-10-30 22:16:56 +0200 |
commit | f1e095f1d206b81b44160f41278ce5c78641e9b7 (patch) | |
tree | bd293d46d2d3e4cdf435a22ddb2877c6ba1b8acc /arch/arm/mach-at91/pm.c | |
parent | b0438a1b71955c425c304a2a483765ef24841766 (diff) | |
parent | 1792f17b7210280a3d7ff29da9614ba779cfcedb (diff) |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
-rw-r--r-- | arch/arm/mach-at91/pm.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 615668986480..dafbacc25eb1 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -258,16 +258,23 @@ static int at91_pm_enter(suspend_state_t state) * NOTE: the Wait-for-Interrupt instruction needs to be * in icache so no SDRAM accesses are needed until the * wakeup IRQ occurs and self-refresh is terminated. + * For ARM 926 based chips, this requirement is weaker + * as at91sam9 can access a RAM in self-refresh mode. */ - asm("b 1f; .align 5; 1:"); - asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + asm volatile ( "mov r0, #0\n\t" + "b 1f\n\t" + ".align 5\n\t" + "1: mcr p15, 0, r0, c7, c10, 4\n\t" + : /* no output */ + : /* no input */ + : "r0"); saved_lpr = sdram_selfrefresh_enable(); - asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + wait_for_interrupt_enable(); sdram_selfrefresh_disable(saved_lpr); break; case PM_SUSPEND_ON: - asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + cpu_do_idle(); break; default: |