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authorRafael J. Wysocki <rjw@sisk.pl>2011-12-21 09:51:23 +0100
committerRafael J. Wysocki <rjw@sisk.pl>2011-12-21 09:51:23 +0100
commitdfa9d178cd28caf5d76bc4f37f4b3e7e8df8e697 (patch)
treed97ca7790d8a622cba9fdd19832decdb0aa6418a /arch/arm/lib/bitops.h
parent3f19f08a7ec74cfc50fbad3c5e615760afbd23a0 (diff)
parent7b4050381127ae11fcfc74a106d715a5fbbf888a (diff)
Merge branch 'devfreq-for-next' of git://git.infradead.org/users/kmpark/linux-samsung into pm-devfreq
* 'devfreq-for-next' of git://git.infradead.org/users/kmpark/linux-samsung: (765 commits) PM/Devfreq: Add Exynos4-bus device DVFS driver for Exynos4210/4212/4412. pci: Fix hotplug of Express Module with pci bridges i2c-eg20t: correct the driver init order of pch_i2c_probe() I2C: OMAP: fix FIFO usage for OMAP4 i2c-s3c2410: Fix return code of s3c24xx_i2c_parse_dt_gpio i2c: i2c-s3c2410: Add a cpu_relax() to busy wait for bus idle Linux 3.2-rc6 Revert "drm/i915: fix infinite recursion on unbind due to ilk vt-d w/a" btrfs: lower the dirty balance poll interval drm/i915/dp: Dither down to 6bpc if it makes the mode fit drm/i915: enable semaphores on per-device defaults drm/i915: don't set unpin_work if vblank_get fails drm/i915: By default, enable RC6 on IVB and SNB when reasonable iommu: Export intel_iommu_enabled to signal when iommu is in use drm/i915/sdvo: Include LVDS panels for the IS_DIGITAL check drm/i915: prevent division by zero when asking for chipset power drm/i915: add PCH info to i915_capabilities drm/i915: set the right SDVO transcoder for CPT drm/i915: no-lvds quirk for ASUS AT5NM10T-I sched: Fix select_idle_sibling() regression in selecting an idle SMT sibling ...
Diffstat (limited to 'arch/arm/lib/bitops.h')
-rw-r--r--arch/arm/lib/bitops.h26
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 10d868a5a481..d6408d1ee543 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,5 +1,9 @@
+#include <asm/unwind.h>
+
#if __LINUX_ARM_ARCH__ >= 6
- .macro bitop, instr
+ .macro bitop, name, instr
+ENTRY( \name )
+UNWIND( .fnstart )
ands ip, r1, #3
strneb r1, [ip] @ assert word-aligned
mov r2, #1
@@ -13,9 +17,13 @@
cmp r0, #0
bne 1b
bx lr
+UNWIND( .fnend )
+ENDPROC(\name )
.endm
- .macro testop, instr, store
+ .macro testop, name, instr, store
+ENTRY( \name )
+UNWIND( .fnstart )
ands ip, r1, #3
strneb r1, [ip] @ assert word-aligned
mov r2, #1
@@ -34,9 +42,13 @@
cmp r0, #0
movne r0, #1
2: bx lr
+UNWIND( .fnend )
+ENDPROC(\name )
.endm
#else
- .macro bitop, instr
+ .macro bitop, name, instr
+ENTRY( \name )
+UNWIND( .fnstart )
ands ip, r1, #3
strneb r1, [ip] @ assert word-aligned
and r2, r0, #31
@@ -49,6 +61,8 @@
str r2, [r1, r0, lsl #2]
restore_irqs ip
mov pc, lr
+UNWIND( .fnend )
+ENDPROC(\name )
.endm
/**
@@ -59,7 +73,9 @@
* Note: we can trivially conditionalise the store instruction
* to avoid dirtying the data cache.
*/
- .macro testop, instr, store
+ .macro testop, name, instr, store
+ENTRY( \name )
+UNWIND( .fnstart )
ands ip, r1, #3
strneb r1, [ip] @ assert word-aligned
and r3, r0, #31
@@ -73,5 +89,7 @@
moveq r0, #0
restore_irqs ip
mov pc, lr
+UNWIND( .fnend )
+ENDPROC(\name )
.endm
#endif