aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/kernel/hw_breakpoint.c
diff options
context:
space:
mode:
authorLinus Torvalds <[email protected]>2017-01-18 11:19:32 -0800
committerLinus Torvalds <[email protected]>2017-01-18 11:19:32 -0800
commitfa19a769f82fb9a5ca000b83cacd13fcaeda51ac (patch)
treef8fca436f994c67d992accea8987ce40bd282bed /arch/arm/kernel/hw_breakpoint.c
parentca92e6c7e6329029d7188487a5c32e86ef471977 (diff)
parent90f92c631b210c1e97080b53a9d863783281a932 (diff)
Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A few ARM fixes: - fix a crash while performing TLB maintanence on early ARM SMP cores - blacklist Scorpion CPUs for hardware breakpoints - ARMs asm/types.h has been included as part of the UAPI due to the way the makefiles work, move it to uapi/asm/types.h to make it official - fix up ftrace syscall name matching" * 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8613/1: Fix the uaccess crash on PB11MPCore MAINTAINERS: update rmk's entries ARM: put types.h in uapi ARM: 8634/1: hw_breakpoint: blacklist Scorpion CPUs ARM: 8632/1: ftrace: fix syscall name matching
Diffstat (limited to 'arch/arm/kernel/hw_breakpoint.c')
-rw-r--r--arch/arm/kernel/hw_breakpoint.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 188180b5523d..be3b3fbd382f 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1063,6 +1063,22 @@ static int __init arch_hw_breakpoint_init(void)
return 0;
}
+ /*
+ * Scorpion CPUs (at least those in APQ8060) seem to set DBGPRSR.SPD
+ * whenever a WFI is issued, even if the core is not powered down, in
+ * violation of the architecture. When DBGPRSR.SPD is set, accesses to
+ * breakpoint and watchpoint registers are treated as undefined, so
+ * this results in boot time and runtime failures when these are
+ * accessed and we unexpectedly take a trap.
+ *
+ * It's not clear if/how this can be worked around, so we blacklist
+ * Scorpion CPUs to avoid these issues.
+ */
+ if (read_cpuid_part() == ARM_CPU_PART_SCORPION) {
+ pr_info("Scorpion CPU detected. Hardware breakpoints and watchpoints disabled\n");
+ return 0;
+ }
+
has_ossr = core_has_os_save_restore();
/* Determine how many BRPs/WRPs are available. */