diff options
author | Joel Fernandes <joelf@ti.com> | 2016-06-01 12:06:42 +0300 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2016-06-22 00:43:25 -0700 |
commit | e7fd15c1d0580e1c5b35f808d064e5460bdaa7fc (patch) | |
tree | af6ec23ffb75bd71d914abedac70f285fb346d26 /arch/arm/boot/dts/dra7.dtsi | |
parent | bac9d0b847a18ff9a0bb77711a8ad1db7400a948 (diff) |
ARM: dts: DRA7: Add DT nodes for AES IP
DRA7 SoC has the same AES IP as OMAP4. Add DT entries for both AES cores.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed in the change to use EDMA, squashed in
support for two AES cores]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index f5a83c4d133e..18090963999b 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1929,6 +1929,28 @@ }; }; + aes1: aes@4b500000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes1"; + reg = <0x4b500000 0xa0>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>; + dma-names = "tx", "rx"; + clocks = <&l3_iclk_div>; + clock-names = "fck"; + }; + + aes2: aes@4b700000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes2"; + reg = <0x4b700000 0xa0>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>; + dma-names = "tx", "rx"; + clocks = <&l3_iclk_div>; + clock-names = "fck"; + }; + des: des@480a5000 { compatible = "ti,omap4-des"; ti,hwmods = "des"; |