diff options
| author | Rodrigo Vivi <[email protected]> | 2018-07-23 09:13:12 -0700 | 
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2018-07-23 09:13:12 -0700 | 
| commit | c74a7469f97c0f40b46e82ee979f9fb1bb6e847c (patch) | |
| tree | f2690a1a916b73ef94657fbf0e0141ae57701825 /arch/arm/boot/compressed/head.S | |
| parent | 6f15a7de86c8cf2dc09fc9e6d07047efa40ef809 (diff) | |
| parent | 500775074f88d9cf5416bed2ca19592812d62c41 (diff) | |
Merge drm/drm-next into drm-intel-next-queued
We need a backmerge to get DP_DPCD_REV_14 before we push other
i915 changes to dinq that could break compilation.
Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'arch/arm/boot/compressed/head.S')
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 20 | 
1 files changed, 10 insertions, 10 deletions
| diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 45c8823c3750..517e0e18f0b8 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -29,19 +29,19 @@  #if defined(CONFIG_DEBUG_ICEDCC)  #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) -		.macro	loadsp, rb, tmp +		.macro	loadsp, rb, tmp1, tmp2  		.endm  		.macro	writeb, ch, rb  		mcr	p14, 0, \ch, c0, c5, 0  		.endm  #elif defined(CONFIG_CPU_XSCALE) -		.macro	loadsp, rb, tmp +		.macro	loadsp, rb, tmp1, tmp2  		.endm  		.macro	writeb, ch, rb  		mcr	p14, 0, \ch, c8, c0, 0  		.endm  #else -		.macro	loadsp, rb, tmp +		.macro	loadsp, rb, tmp1, tmp2  		.endm  		.macro	writeb, ch, rb  		mcr	p14, 0, \ch, c1, c0, 0 @@ -57,7 +57,7 @@  		.endm  #if defined(CONFIG_ARCH_SA1100) -		.macro	loadsp, rb, tmp +		.macro	loadsp, rb, tmp1, tmp2  		mov	\rb, #0x80000000	@ physical base address  #ifdef CONFIG_DEBUG_LL_SER3  		add	\rb, \rb, #0x00050000	@ Ser3 @@ -66,8 +66,8 @@  #endif  		.endm  #else -		.macro	loadsp,	rb, tmp -		addruart \rb, \tmp +		.macro	loadsp,	rb, tmp1, tmp2 +		addruart \rb, \tmp1, \tmp2  		.endm  #endif  #endif @@ -561,8 +561,6 @@ not_relocated:	mov	r0, #0  		bl	decompress_kernel  		bl	cache_clean_flush  		bl	cache_off -		mov	r1, r7			@ restore architecture number -		mov	r2, r8			@ restore atags pointer  #ifdef CONFIG_ARM_VIRT_EXT  		mrs	r0, spsr		@ Get saved CPU boot mode @@ -1297,7 +1295,7 @@ phex:		adr	r3, phexbuf  		b	1b  @ puts corrupts {r0, r1, r2, r3} -puts:		loadsp	r3, r1 +puts:		loadsp	r3, r2, r1  1:		ldrb	r2, [r0], #1  		teq	r2, #0  		moveq	pc, lr @@ -1314,8 +1312,8 @@ puts:		loadsp	r3, r1  @ putc corrupts {r0, r1, r2, r3}  putc:  		mov	r2, r0 +		loadsp	r3, r1, r0  		mov	r0, #0 -		loadsp	r3, r1  		b	2b  @ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr} @@ -1365,6 +1363,8 @@ __hyp_reentry_vectors:  __enter_kernel:  		mov	r0, #0			@ must be 0 +		mov	r1, r7			@ restore architecture number +		mov	r2, r8			@ restore atags pointer   ARM(		mov	pc, r4		)	@ call kernel   M_CLASS(	add	r4, r4, #1	)	@ enter in Thumb mode for M class   THUMB(		bx	r4		)	@ entry point is always ARM for A/R classes |