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| author | Ard Biesheuvel <[email protected]> | 2021-12-15 09:31:36 +0100 |
|---|---|---|
| committer | Russell King (Oracle) <[email protected]> | 2021-12-17 12:02:17 +0000 |
| commit | 8536a5ef886005bc443c2da9b842d69fd3d7647f (patch) | |
| tree | c376607dc2a422250496cd07040d89d81b9fc542 /Documentation/filesystems/caching/netfs-api.rst | |
| parent | 7202216a6f34d571a22274e729f841256bf8b1ef (diff) | |
ARM: 9169/1: entry: fix Thumb2 bug in iWMMXt exception handling
The Thumb2 version of the FP exception handling entry code treats the
register holding the CP number (R8) differently, resulting in the iWMMXT
CP number check to be incorrect.
Fix this by unifying the ARM and Thumb2 code paths, and switch the
order of the additions of the TI_USED_CP offset and the shifted CP
index.
Cc: <[email protected]>
Fixes: b86040a59feb ("Thumb-2: Implementation of the unified start-up and exceptions code")
Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Russell King (Oracle) <[email protected]>
Diffstat (limited to 'Documentation/filesystems/caching/netfs-api.rst')
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