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authorSean Christopherson <[email protected]>2021-11-29 21:43:42 +0000
committerPalmer Dabbelt <[email protected]>2022-01-09 12:13:31 -0800
commit869c70609248102f3a2e95a39b6233ff6ea2c932 (patch)
treeab52f1bebf596bd9a0cd847c25da4b2391258311 /Documentation/filesystems/caching/backend-api.rst
parent51f23e5318a0882068254e20d3999e9421cfd66e (diff)
RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n
Use what is currently the SMP=y version of riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n to fix a build failure with KVM=m and SMP=n due to boot_cpu_hartid not being exported. This also fixes a second bug where the SMP=n version assumes the sole CPU in the system is in the incoming mask, which may not hold true in kvm_riscv_vcpu_sbi_ecall() if the KVM guest VM has multiple vCPUs (on a SMP=n system). Fixes: 1ef46c231df4 ("RISC-V: Implement new SBI v0.2 extensions") Reported-by: Adam Borowski <[email protected]> Reviewed-by: Anup Patel <[email protected]> Signed-off-by: Sean Christopherson <[email protected]> Cc: [email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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