diff options
| author | Anshuman Khandual <anshuman.khandual@arm.com> | 2022-01-25 19:50:32 +0530 |
|---|---|---|
| committer | Mathieu Poirier <mathieu.poirier@linaro.org> | 2022-01-27 12:01:53 -0700 |
| commit | 607a9afaae09cde21ece458a8f10cb99d3f94f14 (patch) | |
| tree | 9d607431de66713bc3f7c4c9aa999d8324259c3e /Documentation/filesystems/caching/backend-api.rst | |
| parent | 53960faf2b731dd2f9ed6e1334634b8ba6286850 (diff) | |
arm64: errata: Add detection for TRBE ignored system register writes
TRBE implementations affected by Arm erratum #2064142 might fail to write
into certain system registers after the TRBE has been disabled. Under some
conditions after TRBE has been disabled, writes into certain TRBE registers
TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1 and TRBTRG_EL1 will be
ignored and not be effected. This adds a new errata ARM64_ERRATUM_2064142
in arm64 errata framework.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: coresight@lists.linaro.org
Cc: linux-doc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/1643120437-14352-3-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'Documentation/filesystems/caching/backend-api.rst')
0 files changed, 0 insertions, 0 deletions