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authorPratyush Yadav <p.yadav@ti.com>2022-03-01 16:46:19 +0530
committerVinod Koul <vkoul@kernel.org>2022-03-02 19:54:42 +0530
commit40b95583561e18480d36c732b89cc1126725078c (patch)
treec9e530b2e0bbbddb05a3011e9ad1bc4307656c6b /Documentation/devicetree/bindings/phy/cdns,dphy.yaml
parent41d393aaead4e51d709b860176102b18bedb3c68 (diff)
phy: dt-bindings: Convert Cadence DPHY binding to YAML
Convert Cadence DPHY binding to YAML. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220301111621.2992275-3-p.yadav@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence DPHY Device Tree Bindings
+
+maintainers:
+ - Pratyush Yadav <p.yadav@ti.com>
+
+properties:
+ compatible:
+ items:
+ - const: cdns,dphy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: PMA state machine clock
+ - description: PLL reference clock
+
+ clock-names:
+ items:
+ - const: psm
+ - const: pll_ref
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+
+ dphy0: phy@fd0e0000{
+ compatible = "cdns,dphy";
+ reg = <0xfd0e0000 0x1000>;
+ clocks = <&psm_clk>, <&pll_ref_clk>;
+ clock-names = "psm", "pll_ref";
+ #phy-cells = <0>;
+ };